Bandgap reference current sources or bandgap circuits are in widespread use in integrated circuits.
FIG. 1 shows a subcircuit of a bandgap reference current source according to the prior art. The subcircuit in accordance with FIG. 1 contains an operational amplifier OP having an inverting input (−) and a noninverting input (+). The output of the operational amplifier OP supplies a voltage (VREF), which is present at the gate terminals of two PMOS transistors PA, PB in order to close a control loop. A supply voltage VDD is present at the PMOS transistor PA, PB. The first PMOS transistor PA is connected to the noninverting signal input (+) of the operational amplifier OP and, via a resistor RA, to a diode DA. The second PMOS transistor PB is connected to the inverting signal input (−) of the operational amplifier OP and is connected to ground via a diode DB. The two diodes DA and DB have a specific current density ratio n.
The offset voltage of the operational amplifier greatly influences the accuracy of the circuit arrangement illustrated in FIG. 1. Ideally, the subcircuit supplies a current
      I    A    =                    U        T                    R        A              .  lnn flowing through the resistor RA. Since the voltage UT·lnn is small and generally has a value of 10 to 100 mV the current IA is greatly dependent on the offset voltage of the operational amplifier.
If the subcircuit illustrated in FIG. 1 is integrated on a chip, the diodes are formed in the form of pn junctions Drain/BULK or Well/Substrate.
FIG. 2 shows a bandgap reference voltage source according to the prior art, as is described for example in U. Tietze, C. H. Shenk, 11th Edition, Springer Verlag (ISBN 3-540-64192-0), on pp. 175–977.
The bandgap reference voltage source according to the prior art such as is illustrated in FIG. 2 likewise contains an operational amplifier OP having an inverting input (−) and a noninverting input (+), the inverting input being connected via a resistor R3 to a supply voltage VDD and the noninverting input (+) being connected via a resistor R4 to the supply voltage VDD. The resistance of the resistor R4 is a factor n lower than the resistance of the resistor R3.
The bandgap reference voltage source according to the prior art such as is illustrated in FIG. 2 contains two bipolar transistors T1, T2, the collector terminal of the first bipolar transistor T1 being connected to the resistor R3 and the collector terminal of the second bipolar transistor T2 being connected to the resistor R4. The base terminals of the two bipolar transistors T1, T2 are connected to the output of the operational amplifier OP. The emitter terminal of the first bipolar transistor T1 is connected to a potential node K via a resistor R1. The emitter terminal of the second bipolar transistor T2 is also connected to the potential node K. The potential node K is connected to ground via a resistor R2.
The reference voltage VREF generated is present at the output of the operational amplifier OP.
The base-emitter voltage UBE2 of the second transistor T2 is used as a voltage reference, although the temperature coefficient thereof is very high with a value of −2 mV/K at 0.6 V. This temperature coefficient is compensated for by adding a voltage with a temperature coefficient of +2 mV/K. In the case of the bandgap reference voltage according to the prior art as illustrated in FIG. 2, said compensation voltage is generated by means of the second transistor T2. The two bipolar transistors T1, T2 are operated with different collector currents IC2>IC1.
A voltage drop results on the transfer characteristic curve of the resistor R1:
                                                                        Δ                ⁢                                                                  ⁢                                  U                  BE                                            =                                                U                                      BE                    2                                                  -                                  U                                      BE                    1                                                                                                                          =                                                U                  T                                ⁢                ln                ⁢                                                                  ⁢                                                      I                    C2                                                        I                    C1                                                                                                                          =                                                                    k                    ·                    T                                    q                                ⁢                ln                ⁢                                                                  ⁢                                                      I                    C2                                                        I                    C1                                                                                                          (        1        )            
where T is the absolute temperature, and
q is the elementary charge.
The voltage drop ΔUBE is proportional to the voltage equivalent of thermal energy UT and thus proportional to the absolute temperature T.
A correspondingly larger voltage drop results at the resistor R2 since not only the collector current
            I      C1        =                  Δ        ⁢                                  ⁢                  U          BE                            R        1              ,but also the further collector current IC2 flows through the resistor R2.
The operation amplifier OP sets its output voltage in such a way that IC2=n·IC1 holds true.
The following thus results:
                                                                        U                Temp                            =                                                R                  2                                ⁡                                  (                                                            I                      C1                                        +                                          I                      C2                                                        )                                                                                                        =                                                R                  2                                ⁢                                                      Δ                    ⁢                                                                                  ⁢                                          U                      BE                                                                            R                    1                                                  ⁢                                  (                                      1                    +                    n                                    )                                                                                                        =                                                U                  T                                ⁢                                                      R                    2                                                        R                    1                                                  ⁢                                  (                                      1                    +                    n                                    )                                ⁢                ln                ⁢                                                                  ⁢                n                                                                                        =                              AU                T                                                                        (        2        )                                                                                    U                REF                            =                                                U                  Temp                                +                                  U                  BE2                                                                                                        =              constant                                                          (        3        )            
Arbitrary gain factors A can be realized through the choice of the current ratio n and the resistance ratio R2/R1.
The bandgap reference voltage source according to the prior art as shown in FIG. 2 contains operational amplifier OP.
FIG. 3 shows a circuitry construction of a simple operational amplifier with a MOS differential amplifier stage.
Operational amplifiers that are integrated on a chip in CMOS technology have a high offset voltage. The bandgap reference voltage sources according to the prior art as shown in FIGS. 1, 2 are very sensitive toward alterations of the offset voltage of the operational amplifier OP, i.e. small changes in the offset voltage lead to high deviations in the reference voltage. The variation in the offset voltage caused by the production process thus leads to a high fluctuation of the reference voltage VREF output by the bandgap reference voltage source.